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	1.	Chip design for submicron VLSI:cmos layout and simulation John P Uyemura by Vyemura, J P. Material type: Text; Format: print ; Literary form: Not fiction Language: English Publication details: Australia Cengage learning 2006Availability: Items available for reference: NISER LIBRARY: R (REFERENCE) (1)Call number: 621.38 UYE-C. Log in to add tags Add to cart (remove)
	2.	No cover image available No cover image available Chip design for submicron VLSI:cmos layout and simulation Nelson by Nelson. Material type: Music; Literary form: Language: English Publication details: Australia Cengage learning 2006Availability: Items available for loan: NISER LIBRARY (1)Call number: 621.38 NEL-C. Place hold Log in to add tags Add to cart (remove)